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The Parallel Register

The interactive Parallel Register digital logic circuit, with Boolean function
Play around with the circuit to see that it works

Introduction

If you have ever installed a printer or other hardware on your own personal computer, quite likely you have had to choose between a parallel port and a serial port. What this question is actually asking you is to choose your blessing, or poison — depending on how you look at it. The serial port on your computer allows you to use a single wire and a single circuit cell to transfer data. This method of transferring data is good except in one way. Because you are only using one wire and one circuit block, the component is relatively inexpensive to build and is physically relatively small. And people like small electronics. But there is a catch. The serial port is slow. It is slow because it only transfers one bit of data for every clock cycle. As a consequence, it takes eight clock cycles to move 1 byte (= 8 bits) of data.

Compare Figure1 to the main interactive circuit at the top, however. They are both really the same register: both have four flipflops arranged in parallel and therefore can only store and transfer 4–bit data per clock cycle. But the main interactive register uses four 2–to–1 multiplexers to protect the data inside the flipflops from whatever is happening at the input pins. The Load switch decides when the signals at the data ports may be transferred into the flipflops. The main interactive circuit is an example of a robust register.

Each 2–to–1 multiplexer is wired to an input switch and to a flipflop output feedback. The Load switch serves as the selector switch of the multiplexers. When Load = 1 the multiplexer lets the input signal X through; when Load =0 the multiplexer lets the feedback signal Q through. At all time the clock signal is free to come in. But the clock signal does not control the circuit; the Load switch does. Figure 2 shows a single 2–to–1 multiplexer; in case you wanted to see one by itself.

Interactive single 2–to–1 multiplexer digital logic circuit, with Boolean function
Figure 2

A final note: it is often tempting to gate the clock signal — as opposed to the input signals — so as to control access to the register. The reasoning being, if we prevent the clock signal from reaching the register, then the data inside the register cannot change. The problem with this practice is that it interposes propagation delays and will cause the register to go out of synchronism with the master clock and the rest of the digital system. Therefore, using a loading switch with multiplexers or similar gating techniques to control the connection between the data bus and the register is a superior design method — as shown in the main interactive circuit.

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